Applications

Scaling IO Performance of SOCs, ASICs, FPGAs, Memories, MCM, MCP, Chip-Mem, Chip-Chip Applications
DDR4+ Memories | Single Ended HSTL IO | JEDEC Standard | Low power | Low pincount | High BW | Robust SI
Patented Technology, Silicon, Package, Reference Board, Designs

Chip to Chip Interface

Memory Scaling

Single Ended HSTL PHY